Allegro MicroSystems, LLC Introduces New Quad DMOS Full Bridge PWM Motor Driver IC
Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. A low power sleep mode is included to reduce power dissipation. Protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO) and crossover-current and over-current protection. Special power-up sequencing is not required.
The A5988 is supplied in two packages, EV and JP, with exposed power tabs for enhanced thermal performance. The EV is a 6 mm × 6 mm, 36-pin QFN package with a nominal overall package height of 0.90 mm. The JP is a 7 mm × 7 mm 48-pin LQFP. Both packages are lead (Pb) free, with 100% matte-tin leadframe plating.
